JTAGulator by Grand Idea Studio
On-chip debug (OCD) interfaces can provide chip-level control of a target device and are a primary vector used by engineers, researchers, and hackers to extract program code or data, modify memory contents, or affect device operation on-the-fly. Depending on the complexity of the target device, manually locating available OCD connections can be a difficult and time consuming task, sometimes requiring physical destruction or modification of the device.
JTAGulator is an open source hardware tool that assists in identifying OCD connections from test points, vias, or component pads on a target device.
This is a high end JTAG reverse-engineering tool! Be careful when using and select the correct voltages to avoid damaging it.
- 24 I/O channels with input protection circuitry
- Adjustable target voltage for level translation: 1.2V to 3.3V
- Supported target interfaces: JTAG/IEEE 1149.1, UART/asynchronous serial
- USB interface for direct connection to host computer
Grand Idea Studio - JTAGulator (2:51)
- To keep up with occasional updates visit Grand Idea Studio's JTAGulator product page
- Slides: JTAGulator: Assisted discovery of on-chip debug interfaces
- Video: Introduction and Demonstration (YouTube)
- Video: Updating Firmware (YouTube)
- Video: Discovering Debug Interfaces with the JTAGulator: Part 1 & Part 2 (YouTube)
- PCB rev B. on OSH Park
- Poem by Zach Houston
- Max Dimensions: 57.68mm / 2.27" x 152.48mm / 6" x 13.4mm / 0.52"
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